1. Field of the Invention
The present invention relates to a semiconductor device and a fabrication method therefor, and, in particular, to a semiconductor device that enables microminiaturization and has a contact structure using aluminum, and to a fabrication method therefor.
2. Description of Background Art
In a semiconductor device such as a LSI, recent advances in microminiaturization, integration, and multi-layering of elements have made it necessary to use connection through-holes such as contact holes and via-holes having high aspect ratios. Filling such connection through-holes with wiring materials is very difficult and, therefore, has become an important technical challenge in recent years. In this regard, attempts have been made to fill connection through-holes with aluminum or aluminum alloys that are useful as a wiring material.
One of the techniques intended for the above requirement is disclosed, for example, in Japanese Patent Application Laid-Open No. 64-76736/1989. This discloses a fabrication method in which aluminum is made to fill connection through-holes in a two-step manner, wherein aluminum or an aluminum alloy is first deposited at a temperature of 150xc2x0 C. or lower, then a further layer of the aluminum or aluminum alloy is grown by bias sputtering.
With this technique, aluminum layers can be deposited comparatively uniformly into connection through-holes and the coverage performance thereof is improved somewhat. However, this has not improved far enough the problem of discontinuity that occurs at conductive parts within the connection through-holes due to causes such as voids.
An objective of the present invention is to provide a semiconductor device having a contact structure that can exhibit superlative step coverage without causing any voids or wiring discontinuities, using aluminum or aluminum alloys as a conductive substance for connection through-holes, in particular, for via-holes.
Another objective of the present invention is to provide a method of fabricating such a semiconductor device as described above.
The method of fabricating a semiconductor device of the present invention applies to a semiconductor device comprising a semiconductor substrate including semiconductor elements, and multi-layered wiring regions, wherein at least one layer of the wiring regions above the first wiring region on the semiconductor substrate is fabricated using a process comprising the following steps (a) to (f):
(a) a step of forming a via-hole in an interlayer dielectric formed above the first wiring region on a semiconductor substrate;
(b) a degassing step for removing gaseous components included within the interlayer dielectric by a heat treatment under reduced pressure and at the substrate temperature of 300xc2x0 C. to 550xc2x0 C.;
(c) a step of forming a wetting layer on the surface of the interlayer dielectric and the via-hole;
(d) a step of cooling the substrate to a temperature of no more than 100xc2x0 C.;
(e) a step of forming a first aluminum layer comprising one of aluminum and an alloy in which aluminum is the main component on the wetting layer at a temperature of no more than 200xc2x0 C.; and
(f) a step of forming a second aluminum layer comprising one of aluminum and an alloy in which aluminum is the main component on the first aluminum layer at a temperature of at least 300xc2x0 C.
One feature of the method of fabricating a semiconductor device in the present invention is the inclusion of the step (b) of removing any gaseous components that may be contained within the interlayer dielectric (the degassing step), performed under specific conditions. The inclusion of this degassing step makes it possible to suppress the generation of gases such as water vapor, nitrogen, hydrogen, or oxygen that may be contained within the interlayer dielectric, during subsequent steps such as the formation of the second aluminum layer under high-temperature conditions of 300xc2x0 C. or higher. Although there are no specific limitations to the preparation of the interlayer dielectric, a chemical vapor deposition (CVD) film using tetraethoxysilane (TEOS) as a silane compound, a multi-layered film comprising a CVD film of TEOS, spin-on-glass (SOG) coatings and TEOS-CVD films, a silicon oxide film prepared by a polycondensation reaction of a silicon compound and hydrogen peroxide, and the like can be mentioned by way of examples.
The present inventors have confirmed that gases such as those mentioned above generated from the interlayer dielectric are absorbed by the wetting layer but not by the aluminum layers within via-holes. Therefore, if any gaseous components contained within the interlayer dielectric are removed prior to the formation of the aluminum layers in the step (b), deterioration in the wettability of the wetting layer and generation of voids caused by gases lying between the wetting layer and the first aluminum layer can certainly be suppressed. This consequently enables formation of contact regions comprising low-resistance aluminum films with good coverage performance within via-holes.
In the present specification, the term xe2x80x9cgaseous componentsxe2x80x9d refers to gases such as water vapor, hydrogen, oxygen, nitrogen, and the like that are generated from the deposited layers, i.e. the interlayer dielectric and the wetting layer, under conditions of a reduced pressure and a substrate temperature of 300xc2x0 C. or higher. In addition, the term xe2x80x9creduced pressurexe2x80x9d refers to a pressure that is preferably no more than 2.6 Pa, or more preferably, no more than 1.3 Pa.
With the method of the present invention, the temperature of the substrate is cooled to 100xc2x0 C. or lower in the above-mentioned step (d), or preferably to between room temperature and 50xc2x0 C. This cooling of the substrate temperature in step (d) ensures that the substrate temperature is lowered sufficiently prior to forming the first aluminum layer. Since the previous degassing step (b) is performed at a high substrate temperature exceeding 300xc2x0 C., lowering the substrate temperature instep (d) ensures that the temperature can be adjusted reliably for the subsequent step (e). Going through the aforementioned steps enables the process to minimize the amount of gases emitted from the interlayer dielectric, wetting layer, and also the entire surface of a wafer during the formation of the first aluminum layer. As a result, the above process can help prevent gases adsorbed at the interface between the wetting layer and the first aluminum layer from adversely affecting the coverage performance and adhesiveness.
By forming the first aluminum layer on the wetting layer in the above-mentioned step (e) at a temperature of no more than 200xc2x0 C., preferably 30xc2x0 C. to 100xc2x0 C., the emission of gaseous components contained within the interlayer dielectric and the wetting layer can be suppressed, thus making it possible to prevent any deterioration in the wettability of the wetting layer caused by the generation of gases from the wetting layer which pass to the outside. As a result, the first aluminum layer can adhere well to the wetting layer, enabling film formation with good step coverage.
The presence of this first aluminum layer makes it possible to suppress the generation of gases from the interlayer dielectric and the wetting layer that underlie the first aluminum layer, even when the temperature of the substrate rises. As a result, the step (f) of forming the second aluminum layer can be performed at a comparatively high temperature, that is, at a temperature high enough for the aluminum or aluminum alloy to flow and diffuse. More specifically, this second aluminum layer can be formed at a temperature of 300xc2x0 C. or more; preferably 350xc2x0 C. to 450xc2x0 C.
As described in the foregoing, by forming the first aluminum layer at a comparatively low temperature in step (e) and then forming the second aluminum layer at a comparatively high temperature in step (f), it becomes possible to fill via-holes with good step coverage but without creating any voids. It has also been confirmed that the fabrication method of the present invention can be applied to via-holes having a diameter of 0.6 xcexcm or less.
The aluminum layers in the aforementioned steps (e) and (f) are preferably formed by a sputtering method, and it is further preferable that the first aluminum layer and the second aluminum layer are formed in sequence within the same chamber. Forming the aluminum layers in sequence in the same chamber in this manner facilitates control over the substrate temperature and also enables accurate control over the atmosphere, thus making it possible to avoid problems such as the formation of oxide films on the surface of the first aluminum layer. The substrate temperature, additionally, is set by regulating the temperature of the stage on which a semiconductor substrate is being mounted.
Further, the steps (d), (e), and (f) are preferably performed sequentially within the same apparatus having a plurality of chambers and being maintained under a reduced pressure. This helps reduce the number of substrate movements and setting steps, thus simplifying the process and preventing substrate contamination.
A semiconductor device fabricated using the aforementioned method is a semiconductor device comprising a semiconductor substrate including semiconductor elements, and multi-layered wiring regions, wherein at least one layer of the wiring regions above the first wiring region on the semiconductor substrate comprises:
an interlayer dielectric from which gaseous components to have been removed by heat treatment;
a via-hole formed in the interlayer dielectric;
a wetting layer formed on the surface of the interlayer dielectric and via-hole; and
an aluminum layer formed on the wetting layer, and comprising either aluminum or an alloy in which aluminum is the main component.
This semiconductor device is characterized in that it has an interlayer dielectric which has had gaseous components removed therefrom by heat treatment, and, as described above, it has a contact region comprising aluminum layers with good step coverage.
The via-hole in accordance with the present invention could be formed by anisotropic dry etching, or it could equally well be formed into a configuration in which the upper end of a via-hole is formed in an appropriately tapered shape by a combination of isotropic wet etching and anisotropic dry etching. This feature is extremely useful in practical application because it allows the use of a general-purpose sputtering apparatus that does not have a high-temperature capability. Specifically, formation of the second aluminum layer can be accomplished at 300xc2x0 C. to 350xc2x0 C., when a via-hole of the above-mentioned type is formed in such a manner that a lower portion thereof is formed by anisotropic dry etching to a diameter of 0.5 to 0.8 xcexcm, with an aspect ratio of between 0.5 and 3.0.